Three dimensional stacked memory that enables a high degree of integration without being relatively restricted to the limitations in resolution found in lithography technology is receiving focus within the field of semiconductor memory devices. Examples of this type of three dimensional stacked memory include that in which memory strings, arranged in a two dimensional matrix, have a column shaped channel body, a tunnel insulating layer stacked so as to cover the side face of the channel body, a charge accumulation layer, a block insulating layer, and a plurality of sheet shaped electrodes that intersect the channel body and are provided with a prescribed gap in the stacking direction.
This type of three dimensional stacked memory uses Gate Induced Drain Leakage (GIDL) current to erase data. In order to use this type of erasing method, there is a semiconductor memory device that is provided with a diffusion region that contains a high concentration of impurities at the top end portion of the channel body. However, there are concerns of not being able to obtain sufficient erasing speed because increasing impurity concentration in the diffusion region gets more difficult with advancements in miniaturization.